By Sorin Alexander Huss
This ebook is the newest contribution to the Chip layout Languages sequence and it includes chosen papers offered on the discussion board on requisites and layout Languages (FDL'06), in September 2006. The ebook represents the state of the art in learn and perform, and it identifies new study instructions. It highlights the position of specification and modelling languages, and offers sensible reviews with specification and modelling languages.
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Extra info for Advances in Design and Specification Languages for Embedded Systems
1554–1562, November 2003. Chapter 3 VERIFICATION-ORIENTED BEHAVIORAL MODELING OF NONLINEAR ANALOG PARTS OF MIXED-SIGNAL CIRCUITS Martin Freibothe1 , Jens Döge1 , Torsten Coym1 , Stefan Ludwig1 , Bernd Straube1 , and Ernst Kock2 1 Fraunhofer-Institut für Integrierte Schaltungen IIS Branch Lab Design Automation Zeunerstr. com Abstract In this work, an approach to the “verification-oriented” modeling of the analog parts’ behavior of mixed-signal circuits is presented. Starting from a continuoustime, continuous-valued behavioral representation of an analog part in terms of a differential-algebraic equation system, a discrete-time, discrete-valued behavioral model is derived.
Example Circuit: Pixel Cell The method presented in Section 3 has been applied to create a verificationoriented model of the analog component depicted in Fig. 6. The figure shows a pixel cell together with an analog switched current (SI) cell. This kind of pixel cell can, for example, be part of an image sensor matrix where an SI cell as a readout circuit is assigned to each column. The photocurrent INW through the photodiode DNW of the pixel cell that is excited by a light source is considered as the input of the analog component.
38 1. ADVANCES IN DESIGN AND SPECIFICATION OF EMBEDDED SYSTEMS Introduction In today’s circuit designs, the integration of analog parts on system-on-chips (SoCs) and ASICs is common practice. Usually in such designs the analog parts comprise a comparatively small fraction of the overall chip area. On the contrary, a large part of the development time of a mixed-signal circuit is spent on the analog parts. Using well-established formal verification techniques, digital circuit designs can be formally verified in order to find design errors.